Transistor biasing Q or Quiescent point DC load line AC load line stablity factor

Q point or quiescent or operating point of BJT

Q-point is an acronym for quiescent point. Q-point is the operating point of the transistor (ICQ,VCEQ) at which it is biased. The concept of Q-point is used when transistor act as an amplifying device and hence is operated in active region of input output characteristics. To operate the BJT at a point it is necessary to provide voltages and currents through external sources.

Importance of q point in transistor

Normally whatever signals we want to amplify will be of the order milli volts or less. If we directly input these signals to the amplifier they will not get amplified as transistor needs voltages greater than cut in voltages for it to be in active region. Only in active region of operation transistor acts as amplifier. So we can establish appropriate DC voltages and currents through BJT by external sources so that BJT operates in active region and superimpose the AC signals to be amplified.The DC voltage and current are so chosen that the transistor remains in active region for entire AC signal excursion. All the input AC signals variations happen around Q-point.

 

Q-point is generally taken to be the intersection point of load line with the output characteristics of the transistor. There can be infinite number of intersection points but q-point is selected in such a way that irrespective of AC input signal swing the transistor remain in active region. 

DC load line

The dc load line is the locus of IC and VCE at which BJT remains in active region i.e. it represents all the possible combinations of IC and VCE for a given amplifier. 

Procedure to draw DC load line

To draw DC load line of a transistor  we need to find the saturation current and cutoff voltage. The saturation current is the maximum possible current through the transistor and occurs at the point where the voltage across the collector is minimum. The cutoff voltage is the maximum possible voltage across the collector and occurs at zero collector current. A common emitter amplifier is shown  the figure below

Voltage divider bias circuit of BJT

Voltage divider bias circuit of BJT

The biasing and blocking capacitors acts as open circuit for DC signals hence can be represented by open circuit terminals . The DC equivalent of amplifier is shown in the figure.

DC equivalent of Voltage divider bias ciruit of BJT

DC equivalent of Voltage divider bias ciruit of BJT

From the DC equivalent circuit by applying Kirchoff’s voltage Law in collector loop in 

                                                  Vce = Vcc – Rc *Ic         (Equation 1)

The two points on the line are found as follows

Cutoff point : To find the cutoff point equate the collector current to zero(actually in cutoff the collector current is ICO which will be of micro amperes order and hence can be assumed to be zero). In equation 1 equating Ic to zero the cutoff point is (Vcc, 0).

Saturation point : To find the saturation point equate the collector voltage to zero(actually in saturation the collector voltage will be around o.2 Volts which is small and hence can be assumed to be zero). In equation 1 equating Vce to zero the cutoff point is (0, Vcc/Rc).

(Vcc, 0) is cut off point where transistor enters in to cut off region from active region and (0, Vcc/Rc) is saturation point where the transistor enters saturation region.

DC load line

DC load line

AC load line

DC load line analysis gives the variation of collector currents and voltage for static situation of Zero AC voltage.The ac load line tells you the maximum possible output voltage swing for a given common-emitter amplifier i.e. the ac load line will tell you the maximum possible peak-to-peak output voltage Vce(cut off) from a given amplifier. 

For AC input signal frequencies the biasing capacitors are chosen such that they acts as short circuits and as open circuits for DC voltages. Hence the AC signal equivalent circuit is shown in the figure below along with the AC load line

AC equivalent circuit of CE amplifier

AC equivalent circuit of CE amplifier

AC load line

AC load line

From the AC equivalent circuit we will get                                                                     Vce = (Rc//Rl)*Ic

The AC output Vce can have at most Vceq (since normally the quiescent point is chosen in such a way that the maximum input signal excursion is symmetrical on both negative and positive half cycles  i.e Vmax = + Vceq and Vmin =  -Vceq so that the transistor stays in active region for entire input signal excursion ), hence the maximum current for that corresponding Vceq is Vceq / (Rc//Rl). Also output collector current can be at most Icq hence the maximum voltage for that corresponding Icq  is Icq*(Rc//Rl). Hence by adding quiescent currents the end points of AC load line are

        Ic(sa)t = Icq+ Vceq/(Rc//Rl) and Vce(off) = Vceq+ Icq*(Rc//Rl)

Below is the graph showing DC and AC load lines

Why stabilization of operating point is needed?

In practice the operating point varies shifts due to drift in temperature e.t.c. As temperature increases Ico, β, Vbe gets affected. The reverse saturation current almost doubles for every 10 degree rise in collector junction temperature. The base to emitter voltage decreases by 2.5 milli volts for every one degree rise in temperature. Hence the operating point should be stabilized against the variations in temperature so that it remains stable. To achieve this biasing circuits are introduced. 

Biasing circuits for BJT

The main aim of biasing circuits is to stabilize the transistor’s operating point irrespective of variations in Ico, β, Vbe which vary because of varying temperature. Mainly the variation of Ico with temperature is a significant one and has to be taken care of.

Stability factors

To quantify how good these these biasing circuits are in stabilizing the operating point stability factors are defined with respect to variation in these transistor parameters.

                                     Stability Factor S = ∂Ic/∂Ico

Similarly S’ = ∂Ic/ ∂β, S’’= ∂Ic/ ∂Vbe

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