NAND gate operation


NAND gate is one of the basic logic gates to perform the digital operation on the input signals. It is the combination of AND Gate followed by NOT gate i.e. it is the opposite operation of AND gate where the Logic NAND gate is complementary of AND gate. The logic output of NAND gate is low (FALSE) only when the inputs are high (TRUE).

NAND Gate Symbol

NAND gate symbol is nothing but a round circle at the end of the AND Gate symbol to indicate the NOT gate fallowed by AND gate.

NAND gate Symbol- two and three inputs


NAND Gate truth table

NAND gate truth table is shown in figure. In the truth table it is shown that when the tow inputs A & B is high then only the output Y is low and in all the remaining conditions the output is high. This property of NAND gate helps in detecting any signal or sensor failure in a group of sensors.

A B output
0 0 1
0 1 1
1 0 1
1 1 0

Let us suppose room temperatures sensed by the three sensors are fed to the NAND Gate to check the sensor failure. If any sensor reading is low or zero then the NAND gate output will high which alerts that one or more sensor failed in the circuit.

NAND Gate using diode and transistor

It is combination of diode AND gate and an inverter using transistor. Figure shows the NAND gate using diode and transistor. When the two inputs A & B are high then two diodes will be reverse biased and the total V is applied to transistor base terminal. Then the transistor becomes active and the output of the transistor is shorted to ground which gives LOW output. Same way in all the other conditions one or two diodes will be forward biased resulting in shorting the V to ground. No voltage is applied to transistor base terminal and transistor will be in cut off.  The total VCC is shorted to output terminal which gives HIGH output.

NAND using diode and transistor

NAND Gate using Transistors


NAND gate using Transistors

As previously described it is a complementary to AND gate. In Transistor AND gate the output as taken at the second transistor output and in NAND gate the output has taken at the collector terminal of the first transistor as shown in figure.When the two inputs A & B are high (5V) then the two transistors T1 and T2 will be operating in Active region and they will acts as a short circuited. So the total current flows to the ground which results in zero current flow in output terminal. In any other condition one or two transistors will not conduct and this will provide an open circuit to ground which results in total current flow through the ground.

NAND Gate using CMOS

NAND gate using CMOS gate

NAND gate using CMOS gate

CMOS NAND gate is one of the important and simple realizations. CMOS is the combination of PMOS and NMOS. The circuit shows the realization of CMOS NAND gate which consists of two PMOS and two NMOS gates.  Here in this circuit when Va and Vb are high i.e. at 5V then the two PMOS will be open circuited and two NMOS will be Short circuited. The output Vout will be shorted to ground and produces zero output. If any of the input is low (0 V) corresponding PMOS will be shorted and NMOS will opened the Vout is shorted to Vdd which provides high output. The truth table shows all the possible operation of NAND gate using CMOS.

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